VIN (min) (V) | 3 |
VIN (max) (V) | 12 |
VOUT (min) (V) | 0.8375 |
VOUT (max) (V) | 1.65 |
IOUT (max) (A) | >120 |
The ISL6556A controls microprocessor core voltage regulation by driving up to 4 synchronous-rectified buck channels in parallel. Multi-phase buck converter architecture uses interleaved timing to multiply channel ripple frequency and reduce input and output ripple currents. Lower ripple results in fewer components, lower component cost, reduced power dissipation, and smaller implementation area.
The ISL6556A utilizes rDS(ON) current sensing in each phase for adaptive voltage positioning (droop), channelcurrent balancing, and overcurrent protection. To ensure droop accuracy, an external NTC compensation circuit can be used to completely nullify the effect of temperature related variation in rDS(ON).
A unity gain, differential amplifier is provided for remote voltage sensing. Any potential difference between remote and local grounds can be eliminated using the remote-sense amplifier. The precision threshold-sensitive enable input is available to accurately coordinate the start up of the ISL6556A with Intersil MOSFET driver IC. Dynamic-VIDTM technology allows seamless on-the-fly VID changes. The offset pin allows accurate voltage offset settings that are independent of VID setting. The ISL6556A uses 5V bias and has a built-in shunt regulator to allow 12V bias using only a small external limiting resistor.
芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
ISL6556ACBZ | 量产 | 民用级 | 28 Ld SOIC | 3 | 2.11 |
ISL6556ACBZ-T | 量产 | 民用级 | 28 Ld SOIC T+R | 3 | 2.11 |
ISL6556ACRZ | 量产 | 民用级 | 32 Ld QFN | 3 | 2.16 |
ISL6556ACRZ-T | 量产 | 民用级 | 32 Ld QFN T+R | 3 | 2.16 |
ISL6556ACB | 停产 | 民用级 | 28 Ld SOIC | 1 | N/A |
ISL6556ACB-T | 停产 | 民用级 | 28 Ld SOIC T+R | 1 | N/A |
ISL6556ACR | 停产 | 民用级 | 32 Ld QFN | 1 | N/A |
ISL6556ACR-T | To Be Discontinued | 民用级 | 32 Ld QFN T+R | 1 | 2.16 |