The ISL6263 IC is a Single-Phase Synchronous-Buck PWM voltage regulator featuring Intersil's Robust Ripple Regulator (R3) TechnologyTM. The ISL6263 is an implementation of the Intel(R) Mobile Voltage Positioning (IMVP) protocol for GPU Render Engine core power. Integrated MOSFET drivers, bootstrap diode, and droop amplifier result in lower component cost and smaller implementation area.
Intersil's R3 TechnologyTM combines the best features of both fixed-frequency PWM and hysteretic PWM, delivering excellent light-load efficiency and superior load transient response by commanding variable switching frequency during the transitory event.
To maximize light load efficiency, the ISL6263 automatically transitions between continuous-conduction-mode (CCM) and discontinuous-conduction-mode (DCM.) During DCM the low-side MOSFET enters diode-emulation-mode (DEM.) DEM is enabled whenever a Render Suspend state has been set on the VID inputs. Optionally, DEM can be enabled for all VID states by setting the FDE pin high. The ISL6263 has an audio filter that can be enabled in any Render Suspend state by pulling the AF_EN pin high. The audio filter prevents the PWM switching frequency from entering the audible spectrum due to extremely light load while in DEM.
The Render core voltage can be dynamically programmed from 0.41200V to 1.28750V by the five VID input pins without requiring sequential stepping of the VID states. The ISL6263 uses the same capacitor for the soft-start slew-rate and for the dynamic VID slew-rate by internally connecting the SOFT pin to the appropriate current source. Processor socket Kelvin sensing is accomplished with an integrated unity-gain true differential amplifier.
| 芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 |
| ISL6263CRZ | 量产 | 民用级 | 32 Ld QFN |
| ISL6263CRZ-T | 量产 | 民用级 | 32 Ld QFN T+R |
| ISL6263EVAL1 | Coming Soon | 评估板 |