The ISL6119 is a USB dual port power controller, fully independent overcurrent (OC) fault protection IC. Operational over the +2.5V to +5.5V range, this device features internal current monitoring, accurate current limiting, integrated power switches and current limited delay to latch-off for system protection.
The ISL6119 current sense and limiting circuitry sets the current limit to a nominal 1A, making this device well suited for the USB port power management application. The ISL6119 provides OC fault notification, accurate current limiting and a consistent timed latch-off thus isolating and protecting the voltage bus in the presence of an OC event or short circuit. The 12ms time to latch-off is independent of the adjoining switch's electrical or thermal condition and the OC response time is inversely related to the OC magnitude.
Each ISL6119 incorporates in a single 8 lead SOIC package two 80mΩ N-channel MOSFET power switches for power control. Each switch is driven by a constant current source giving a controlled ramp up of the output voltage. This provides a soft start turn-on eliminating bus voltage drooping caused by inrush current while charging heavy load capacitances. Independent enabling inputs and fault reporting outputs for each channel are compatible with 3V and 5V logic to allow external control and monitoring.
The ISL6119 undervoltage lockout feature prevents turn-on of the outputs unless the correct ENABLE state and VIN > 2.5V are present. During initial turn-on the ISL6119 prevents fault reporting by blanking the fault signal. Rising and falling outputs are current limited voltage ramps so that both the inrush current and voltage slew rate are limited, independent of load. This reduces supply droop due to surge and eliminates the need for external EMI filters. During operation, once an OC condition is detected the appropriate output is current limited for 12ms to allow transient conditions to pass. If still in current limit after the current limit period has elapsed, the output is then latched off and the fault is reported by pulling the corresponding FAULT low. The FAULT signal is latched low until reset by the ENABLE signal being de-asserted at which time the FAULT signal will clear
| 芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
| ISL6119EVAL1 | 量产 | 评估板 | N/A | 价格录入中 | |
| ISL6119HIBZA | 量产 | Hi-Temp Comm | 8 Ld SOIC | 1 | 0.96 |
| ISL6119HIBZA-T | 量产 | Hi-Temp Comm | 8 Ld SOIC T+R | 1 | 0.96 |
| ISL6119LIBZA | 量产 | 工业级 | 8 Ld SOIC | 1 | 0.96 |
| ISL6119LIBZA-T | 量产 | 工业级 | 8 Ld SOIC T+R | 1 | 0.96 |
| ISL6119USBEVAL1 | 量产 | 评估板 | N/A | 价格录入中 | |
| ISL6119HIB | 停产 | 工业级 | 8 Ld SOIC | 1 | N/A |
| ISL6119HIB-T | 停产 | 工业级 | 8 Ld SOIC T+R | 1 | N/A |
| ISL6119LIB | 停产 | 工业级 | 8 Ld SOIC | 1 | N/A |
| ISL6119LIB-T | 停产 | 工业级 | 8 Ld SOIC T+R | 1 | N/A |