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ISL54103 DDC Accelerator (DDCA)

The ISL54103 DDC Accelerator (DDCA) is a dual active pull-up bus terminator designed to improve data transmission speed on the DDC 2-wire serial bus interfaces.

The DDCA detects rising input transitions with two internal voltage references and two comparators per channel. After the voltage on a data line crosses the first threshold (VTRIPL), the boost pull-up current source is activated to speed transition. After the voltage crosses the second threshold (VTRIPH), the boost pull-up current source is de-activated, leaving an active pull-up current of 275μA on the line. When both channels are HIGH, the pull-up current for both lines is reduced to 100μA to save power. Internal logic ensures that the active and boost pull-up current sources are not activated during downward transitions.

The level for VTRIPH is controlled by a bandgap voltage referred to VDD. This feature makes the switching behavior invariant for all power supply voltages between 2.7V and 5.5V.

A noise filter on each channel prevents the circuit from responding to input transitions that do not exceed a voltage-time threshold. To activate the boost circuit, the input must exceed VTRIPL by 100Vns (typical) (See Figure 10).

The DDCA permits operation of the bus at frequencies up to 100kHz, despite the capacitive loads of multiple devices and/or long PC board traces. Enhanced ESD protection on the accelerator pins are guaranteed to withstand 8kV ESD (HBM) events.

The DDC Accelerator provides an essential function in DDC applications because of distributed capacitance of the DDC wires in long video cables. By incorporating DDCA, systems using DDC can reliably increase their bus load, allowing longer cables, without the risk of data corruption.

ISL54103 特点
ISL54103 应用
ISL54103 芯片订购指南
芯片型号 产品状态 温度范围 封装尺寸图 潮湿敏感度等级MSL 美元价格US $
ISL54103IHZ-T7 量产 工业级 5 Ld SOT-23 T+R 3 2.09
ISL54103 应用技术支持与电子电路设计开发资源下载
  1. ISL54103 数据资料 datatSheet 下载.PDF