The HSP50216 Quad Programmable Digital Downconverter (QPDC) is designed for high dynamic range applications such as cellular basestations where multiple channel processing is required in a small physical space. The QPDC combines into a single package, a set of four channels which include: digital mixers, a quadrature carrier NCO, digital filters, a resampling filter, a Cartesian-to-polar coordinate converter and an AGC loop.
The HSP50216 accepts four channels of 16-bit real digitized IF samples which are mixed with local quadrature sinusoids. Each channel carrier NCO frequency is set independently by the microprocessor. The output of the mixers are filtered with a CIC and FIR filters, with a variety of decimation options. Gain adjustment is provided on the filtered signal. The digital AGC provides a gain adjust range of up to 96dB with programmable thresholds and slew rates. A cartesian to polar coordinate converter provides magnitude and phase outputs. A frequency discriminator provides a frequency output via the FIR filter. Selectable outputs include I samples, Q samples, Magnitude, Phase, Frequency and AGC gain. The output resolution is selectable from 4-bit fixed point to 32-bit floating point.
The maximum output bandwidth achievable using a single channel is at least 1MHz.
| 芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
| HSP50216KI | 量产 | 工业级 | 196 Ld BGA | 3 | 80.64 |
| HSP50216KIZ | 量产 | 工业级 | 196 Ld BGA | 3 | 59.36 |
| HSP50216EVAL1 | 停产 | 评估板 | N/A | N/A | |
| HSP50216VI | 停产 | 工业级 | 196 Ld BGA | 3 | N/A |