The HSP50214B Programmable Downconverter converts digitized IF data into filtered baseband data which can be processed by a standard DSP microprocessor. The Programmable Downconverter (PDC) performs down conversion, decimation, narrowband low pass filtering, gain scaling, resampling, and Cartesian to Polar coordinate conversion.
The 14-bit sampled IF input is down converted to baseband by digital mixers and a quadrature NCO, as shown in the Block Diagram. A decimating (4 to 32) fifth order Cascaded Integrator-Comb (CIC) filter can be applied to the data before it is processed by up to 5 decimate-by-2 halfband filters. The halfband filters are followed by a 255-tap programmable FIR filter. The output data from the programmable FIR filter is scaled by a digital AGC before being re-sampled in a polyphase FIR filter. The output section can provide seven types of data: Cartesian (I, Q), polar (R, θ), filtered frequency (dθ/dt), Timing Error (TE), and AGC level in either parallel or serial format.
| 芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
| HSP50214BVC | 量产 | 民用级 | 120 Ld MQFP | 4 | 66.98 |
| HSP50214BVCZ | 停产 | 民用级 | 120 Ld MQFP | 3 | 51.39 |
| HSP50214BVI | 停产 | 工业级 | 120 Ld MQFP | 4 | 84.52 |
| HSP50214BVIZ | 停产 | 工业级 | 120 Ld MQFP | 3 | 64.85 |