The HIP1011A is the second PCI Hot Plug Voltage bus control IC from Intersil. A drop-in alternative to the widely used HIP1011, the HIP1011A has the same form, fit and function but additionally features an adjustable latch-off time of the MOSFET switches and fault reporting.
Like the HIP1011, the HIP1011A creates a small and simple yet complete power control solution with discrete power MOSFETs and a few passive components. Four independent supplies are controlled, +5V, +3.3, +12V, and -12V. The +12V and -12V switches are integrated. For the +5V and +3.3V supplies, overcurrent (OC) protection is provided by sensing the voltage across external current-sense resistors. For the +12V and -12V supplies OC protection is provided internally. In addition, an on-chip reference is used to monitor the +5V, +3.3V and +12V outputs for undervoltage (UV) conditions. The PWRON input controls the state of the switches. During an OC condition on any output, or a UV condition on the +5V, +3.3V or +12V outputs, a LOW (0V) is asserted on the FLTN output and all MOSFETs are latched-off. The time to FLTN signal going LOW and MOSFET latch-off is determined by a single capacitor from the FLTN pin to ground. This added feature allows the system OS to complete housekeeping activities in preparation for an unplanned shut down of the affected card. The FLTN latch is cleared when the PWRON input is toggled low again. During initial power-up of the main VCC supply (+12V), the PWRON input is inhibited from turning on the switches, and the latch is held in the Reset state until the VCC input is greater than 10V.
User programmability of the overcurrent threshold, fault reporting response time, latch-off response time and turn-on slew rate is provided. A resistor connected to the OCSET pin programs the OC threshold. A capacitor may be added to the FLTN pin to adjust both the delay time to reporting a fault and the latch-off of the supplies after an OC or UV event. Capacitors connected to the gate pins set the turn-on rate. In addition the HIP1011A has also been enhanced to tolerate spurious system noise.
| 芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
| HIP1011ACBZA | 量产 | 民用级 | 16 Ld SOIC | 3 | 2.61 |
| HIP1011ACBZA-T | 量产 | 民用级 | 16 Ld SOIC T+R | 3 | 2.61 |
| HIP1011AEVAL1 | 量产 | 评估板 | N/A | 价格录入中 | |
| HIP1011ACB-T | 停产 | 民用级 | 16 Ld SOIC | 1 | N/A |
| HIP1011ACB | 停产 | 民用级 | 16 Ld SOIC T+R | 1 | 3.14 |