Resolution (Bits) | 10 |
Conv. Rate (MSPS) | 60 |
Channels | 1 |
SNR (dBFS) | 53.7 |
SFDR (dBc) | 58.1 |
Power (mW) | 260 |
Supply Voltage (V) | Multi |
Input BW (MHz) | 250 |
Input VIN (Range) (VP-P, differential) |
1 |
INL (max) (±LSB) | 2 |
DNL (max) (±LSB) | 1 |
The HI5766 is a monolithic, 10-bit, analog-to-digital converter fabricated in a CMOS process. It is designed for high speed applications where wide bandwidth and low power consumption are essential. Its 60 MSPS speed is made possible by a fully differential pipelined architecture with an internal sample and hold.
The HI5766 has excellent dynamic performance while consuming only 260mW power at 60 MSPS. Data output latches are provided which present valid data to the output bus with a latency of 7 clock cycles. It is pin-for-pin functionally compatible with the HI5702, HI5703 and the HI5746.
For internal voltage reference, please refer to the HI5767 data sheet.
芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
HI5766KCA | 量产 | 民用级 | 28 Ld SSOP | 1 | 15.28 |
HI5766KCAZ | 量产 | 民用级 | 28 Ld SSOP | 2 | 15.28 |
HI5766KCB | 量产 | 民用级 | 28 Ld SOIC | 1 | 15.28 |
HI5766KCBZ | 量产 | 民用级 | 28 Ld SOIC | 3 | 15.28 |