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ATF1508AS-7JX84 CPLD可编程逻辑器件PLCC-84封装

Commercial tpd -7 ns, -10 ns,
-15 ..
Generic Part . 1508
I/O Pins 84, 100, 160
Macrocells 128
Power Options STANDARD
Registers 128
Usable Gates 3000
Vcc (V) 5.0
Packages TQFP 100
PLCC 84
PQFP 100
Pb-Free Packages TQFP 100
PLCC 84
PQFP 100

Standard Power, Vcc - 5V, 128 MC, ISP, Green package, high speed CPLD

The ATF1508AS is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 128 logic macrocells and up to 100 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1508AS’s enhanced routing switch matrices increase usable gate count and increase odds of successful pin-locked design modifications. The ATF1508AS has up to 96 bi-directional I/O pins and four dedicated input pins, depending on the type of device package selected. Each dedicated pin can also serve as a global control signal, register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell. Each of the 128 macrocells generates a buried feedback that goes to the global bus. Each input and I/O pin also feeds into the global bus. The switch matrix in each logic block then selects 40 individual signals from the global bus. Each macrocell also generates a foldback logic term that goes to a regional bus. Cascade logic between macrocells in the ATF1508AS allows fast, efficient generation of complex logic functions. The ATF1508AS contains eight such logic chains, each capable of creating sum term logic with a fan-in of up to 40 product terms. The ATF1508AS macrocell, shown in Figure 1, is flexible enough to support highly-complex logic functions operating at high speed. The macrocell consists of five sections: product terms and product term select multiplexer; OR/XOR/CASCADE logic, a flip-flop, output select and enable, and logic array inputs. Unused macrocells are automatically disabled by the compiler to decrease power consumption. A security fuse, when programmed, protects the contents of the ATF1508AS. Two bytes (16 bits) of User Signature are accessible to the user for purposes such as storing project name, part number, revision or date. The User Signature is accessible regardless of the state of the security fuse. The ATF1508AS device is an in-system programmable (ISP) device. It uses the industry-standard 4-pin JTAG interface (IEEE Std. 1149.1), and is fully compliant with JTAG’s Boundaryscan Description Language (BSDL). ISP allows the device to be programmed without removing it from the printed circuit board. In addition to simplifying the manufacturing flow, ISP also allows design modifications to be made in the field via software.

ATF1508AS-7JX84 特征
ATF1508AS-7JX84 订货型号
Devices tPD
(ns)
tCOS
(ns)
fMAX
(MHz)
Ordering Code Package Operation Range
ATF1508AS 7.5 4.5 166.7 ATF1508AS-7JX84
ATF1508AS-7AX100
84J
100A
Commercial (0°C to 70°C)
10 5 125 ATF1508AS-10JU84
ATF1508AS-10QU100
ATF1508AS-10AU100
84J
100Q1
100A
Industrial (-40°C to 85°C)
ATF1508ASL 25 15 70 ATF1508ASL-25JU84
ATF1508ASL-25AU100
84J
100A
Industrial (-40°C to 85°C)
ATF1508AS-7JX84 应用技术支持与电子电路设计开发资源下载
  1. ATMEL 爱特梅尔PLD可编程逻辑器件ATF1508AS 数据手册DataSheet 下载.PDF
  2. ATMEL 产品选型目录. PDF
  3. 相关SPLD / CPLD 可编程逻辑选型表
  4. Atmel CPLD Reference Designs . pdf(White Paper, 17 pages, updated 1/01)
    This document describes three full applications using Logic Doubling techniques: 1) 8255 Serial IO expander with IO enable on every pin, 2) Low Power Serial IO expander and 32 LED driver, 3) Four 8-bit PWM generators, bus interface and value latches. Each fits in a 32 macrocell ATF1502 device. It also describes how to add transparent pin latch, ala HC573/373 into a corner of your CPLD. Click here for the Reference Design files for all these designs, plus a fourth Low Power Serial IO expander and 32 LCD driver application that uses each macrocell three ways and a Logic Doubling Tutorial.
  5. ATF15xx-DK2 CPLD 开发套件用户手册. pdf (User Guide, 47 pages, updated 8/02)
    CPLD Development/Programmer Kit User Guide.
  6. ATF15xx 系列ISP 器件用户手册. pdf (User Guide, 54 pages, updated 7/01)
    This document describes in detail the ATDH11xxPC series of ISP Board, Adapter Boards, Atmel's ATMISP software and Atmel's ISP download cable and gives detailed instructions for their use in programming Atmel's ATF15xx family of In-System Programmable CPLDs.
  7. ATF15xx CPLD Family Overview. pdf (Overview, 3 pages, updated 12/05)
    Describes the Atmel ATF15xx Family of Complex Programmable Logic Devices and Atmel's Logic Doubling architecture that allows PLD designers to pack in more logic per macrocell than typical PLDs.