ATF1502BE CPLD可编程逻辑器件
Commercial tpd |
5 ns, 7 ns |
I/O Pins |
44 |
Macrocells |
32 |
Power Options |
ULTRA-LOW |
Registers |
32 |
Usable Gates |
750 |
Vcc (V) |
1.8 |
Packages |
TQFP 44 |
Pb-Free Packages |
TQFP 44 |
Ultra low power, Vcc-1.8V, 32 MC, ISP , High Speed CPLD in Fully Green Package
The ATF1502BE is a high-performance, high-density complex programmable logic device
(CPLD) that utilizes Atmel’s proven electrically-erasable technology. With 32 logic macrocells
and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs.
The ATF1502BE’s enhanced routing switch matrices increase usable gate count and the odds
of successful pin-locked design modifications.
The ATF1502BE has up to 32 bi-directional I/O pins and four dedicated input pins, depending on
the type of device package selected. Each dedicated pin can also serve as a global control signal,
register clock, register reset or output enable. Each of these control signals can be selected
for use individually within each macrocell. Figure 1-1 shows the pin assignments for 44-lead
TQFP Package.
ATF1502BE 特征
- High-performance Fully CMOS, Electrically-erasable Complex Programmable
Logic Device
– 32 Macrocells
– 5 Product Terms per Macrocell, Expandable up to 40 per Macrocell
– 44 Pins
– 5.0 ns Pin-to-pin Propagation Delay
– Registered Operation up to 333 MHz
– Enhanced Routing Resources
– Optimized for 1.8V Operation
– 2 I/O Banks to Facilitate Multi-voltage I/O Operation: 1.8V, 2.5V, 3.3V
- In-System Programming (ISP) Supported
– 1.8V ISP Using IEEE 1532 (JTAG) Interface
– Boundary-scan Testing to IEEE JTAG Std. 1149.1 Supported
- Flexible Logic Macrocell
– D/Latch Configurable Flip-flops
– Global and Individual Register Control Signals
– Global and Individual Output Enable
– Programmable Output Slew Rate with Low Output Drive
– Programmable Open Collector Output Option
– Maximum Logic Utilization by Burying a Register with a COM Output and Vice
Versa
- Fully Green (RoHS Compliant)
- 10 μA Static Current
- Power Saving Option During Operation Using PD1, PD2 Pins
- Programmable Pin-keeper Option on Inputs and I/Os
- Programmable Schmitt Trigger Option on Input and I/O Pins
- Programmable Input and I/O Pull-up Option (per Pin)
- Unused Pins Can Be Configured as Ground (Optional)
- Available in Commercial and Industrial Temperature Ranges
- Available in 44-lead TQFP
- Advanced Digital CMOS Technology
– 100% Tested
– Completely Reprogrammable
– 10,000 Program/Erase Cycles
– 10-year Data Retention
– 2000V ESD Protection
– 200 mA Latch-up Immunity
- Security Fuse Feature
- Hot-Socketing Supported
ATF1502BE 订货型号
tPD (ns) |
tCOS (ns) |
Ordering Code |
Package |
Operation Range |
5 |
6 |
ATF1502BE-5AX44 |
44A |
Commercial (0°C to 70°C) |
7 |
7 |
ATF1502BE-7AU44 |
44A |
Industrial (-40°C to 85°C) |
ATF1502BE 应用技术支持与电子电路设计开发资源下载
- ATMEL 爱特梅尔PLD可编程逻辑器件ATF1502BE 数据手册DataSheet 下载.PDF
- ATMEL 产品选型目录. PDF
- 相关SPLD / CPLD 可编程逻辑选型表
- Atmel CPLD Reference Designs . pdf(White Paper, 17 pages, updated 1/01)
This document describes three full applications using Logic Doubling techniques: 1) 8255 Serial IO expander with IO enable on every pin, 2) Low Power Serial IO expander and 32 LED driver, 3) Four 8-bit PWM generators, bus interface and value latches. Each fits in a 32 macrocell ATF1502 device. It also describes how to add transparent pin latch, ala HC573/373 into a corner of your CPLD. Click here for the Reference Design files for all these designs, plus a fourth Low Power Serial IO expander and 32 LCD driver application that uses each macrocell three ways and a Logic Doubling Tutorial.
- ATF15xx-DK2 CPLD 开发套件用户手册. pdf (User Guide, 47 pages, updated 8/02)
CPLD Development/Programmer Kit User Guide.
- ATF15xx 系列ISP 器件用户手册. pdf (User Guide, 54 pages, updated 7/01)
This document describes in detail the ATDH11xxPC series of ISP Board, Adapter Boards, Atmel's ATMISP software and Atmel's ISP download cable and gives detailed instructions for their use in programming Atmel's ATF15xx family of In-System Programmable CPLDs.
- ATF15xx 系列CPLD概述. pdf