| Flash (Bytes) | 512K |
| SRAM (Bytes) | 32K |
| Ethernet MAC 10/100 | 1 |
| Image Sensor Interface | 1 |
| USB Host | 2xFS |
| External Bus Interface | 1 |
| RTC/RTT | -/1 |
| 10-bit ADC Channels | 4 |
| Peripheral DMA Channels | 24 |
| Max. Clock Speed (MHz) | 210 |
| I/O Pins | 96 |
| SDRAM Interface | 1 |
| NAND Flash ECC | 1/1 |
| Enhanced USART | 4 |
| USART/DBGU | 1/1 |
| SPI | 2 |
| TWI | 2 |
| SSC | 1 |
| MCI | 1 |
| USB Device | FS |
| High Current Pads | 3 |
| 16-bit Timers | 6 |
| Period Interval Timer | 1 |
| Watchdog Timer | 1 |
| Power-On-Reset | 2 |
| Brown Out Detection | 1 |
| On-chip RC Oscillator | 1 |
| Crystal Oscillator/PLL | 2/2 |
| ARM Core | 926E J-S |
| Cache Memory (Bytes) | 16K+8K |
| MMU/MPU | 1/- |
| I/O Voltage Domain (V) | 1.8/3.3 |
| In-System Programming | Y |
| Single Supply | N |
| Pb-Free Packages | PQFP 208 LFBGA 217 |
The AT91SAM9XE512 is a monolithic ARM9-based Flash microcontrollers that combines a 200-MIPS ARM926EJ-S processor core with up to 512K bytes of high-performance on-chip Flash. It offers an unrivalled combination of performance and functionality on a single chip, making these Flash microcontrollers ideal for space-constrained applications where high performance is required.
The SAM9XE512 is designed to reuse the maximum of the peripherals and technology developed for Atmel’s ARM7-based SAM7 family. In addition, the same support infrastructure is used for both the SAM7 and the SAM9XE series, making the migration between both microcontroller families smooth and easy.
The SAM9XE512 provides multiple networking/connectivity options with on-chip USB 2.0 Full Speed Host and Device Ports, an Ethernet 10/100 Base-T MAC as well as a two-slot Multimedia Card Interface (SDCard/SDIO and MultiMediaCard Compliant), a Synchronous Serial Controller (SSC), four USARTs, two master/slave Serial Peripheral Interfaces (SPI), a debug UART and two Two Wire Interfaces (TWI).
The six-layer system bus matrix is linked to the Memory Management Unit of the processor core, as well as to distributed DMA channels on the USB Host, Ethernet and Image Sensor Interface to ensure uninterrupted internal data flows with minimum processor overhead. This concept is extended to peripherals via the Peripheral DMA Controller (PDC) that communicates with DMA interfaces on the USB Device and all other serial I/Os. This industry-leading distributed DMA architecture ensures that internal data transfers occur at maximum possible bandwidth with minimal processor intervention. It enables the SAM9XE512 to perform complex data processing at the same time as high-speed data transfers.
o Incorporates the ARM926EJ-STM ARM(R) Thumb(R) Processor
– DSP instruction Extensions, ARM Jazelle(R) Technology for Java(R) Acceleration
– 8 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICETM, Debug Communication Channel Support
o Additional Embedded Memories
– One 32 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– One 32 Kbyte (for AT91SAM9XE256 and AT91SAM9XE512) or 16 Kbyte (for
AT91SAM9XE128) Internal SRAM, Single-cycle Access at Maximum Matrix Speed
– 128, 256 or 512 Kbytes of Internal High-speed Flash for AT91SAM9XE128,
AT91SAM9XE256 or AT91SAM9XE512 Respectively. Organized in 256, 512 or 1024
Pages of 512 Bytes Respectively.
o 128-bit Wide Access
o Fast Read Time: 60 ns
o Page Programming Time: 4 ms, Including Page Auto-erase,
Full Erase Time: 10 ms
o 10,000 Write Cycles, 10 Years Data Retention, Page Lock Capabilities, Flash
Security Bit
o Enhanced Embedded Flash Controller (EEFC)
– Interface of the Flash Block with the 32-bit Internal Bus
– Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory
Interface
o External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlashTM
o USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,688-byte Configurable Integrated DPRAM
o USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-pin PQFP Device
and Double Port in 217-ball LFBGA Device
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
o Ethernet MAC 10/100 Base-T
– Media Independent Interface or Reduced Media Independent Interface
– 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
o Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
o Bus Matrix
– Six 32-bit-layer Matrix
– Remap Command
o Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timero Incorporates the ARM926EJ-STM ARM(R) Thumb(R) Processor
– DSP instruction Extensions, ARM Jazelle(R) Technology for Java(R) Acceleration
– 8 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer
– 200 MIPS at 180 MHz
– Memory Management Unit
– EmbeddedICETM, Debug Communication Channel Support
o Additional Embedded Memories
– One 32 Kbyte Internal ROM, Single-cycle Access at Maximum Matrix Speed
– One 32 Kbyte (for AT91SAM9XE256 and AT91SAM9XE512) or 16 Kbyte (for
AT91SAM9XE128) Internal SRAM, Single-cycle Access at Maximum Matrix Speed
– 128, 256 or 512 Kbytes of Internal High-speed Flash for AT91SAM9XE128,
AT91SAM9XE256 or AT91SAM9XE512 Respectively. Organized in 256, 512 or 1024
Pages of 512 Bytes Respectively.
o 128-bit Wide Access
o Fast Read Time: 60 ns
o Page Programming Time: 4 ms, Including Page Auto-erase,
Full Erase Time: 10 ms
o 10,000 Write Cycles, 10 Years Data Retention, Page Lock Capabilities, Flash
Security Bit
o Enhanced Embedded Flash Controller (EEFC)
– Interface of the Flash Block with the 32-bit Internal Bus
– Increases Performance in ARM and Thumb Mode with 128-bit Wide Memory
Interface
o External Bus Interface (EBI)
– Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlashTM
o USB 2.0 Full Speed (12 Mbits per second) Device Port
– On-chip Transceiver, 2,688-byte Configurable Integrated DPRAM
o USB 2.0 Full Speed (12 Mbits per second) Host Single Port in the 208-pin PQFP Device
and Double Port in 217-ball LFBGA Device
– Single or Dual On-chip Transceivers
– Integrated FIFOs and Dedicated DMA Channels
o Ethernet MAC 10/100 Base-T
– Media Independent Interface or Reduced Media Independent Interface
– 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit
o Image Sensor Interface
– ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate
– 12-bit Data Interface for Support of High Sensibility Sensors
– SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format
o Bus Matrix
– Six 32-bit-layer Matrix
– Remap Command
o Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timero IEEE(R) 1149.1 JTAG Boundary Scan on All Digital Pins
o Required Power Supplies:
– 1.65V to 1.95V for VDDBU, VDDCORE and VDDPLL
– 1.65V to 3.6V for VDDIOP1 (Peripheral I/Os)
– 3.0V to 3.6V for VDDIOP0 and VDDANA (Analog-to-digital Converter)
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM (Memory I/Os)
o Available in a 208-pin PQFP Green and a 217-ball LFBGA Green Package
| Ordering Code | Package | Package Type | Operating Temperature Range |
| AT91SAM9XE512-QU | PQFP208 | Green | Industrial (-40° C to 85° C) |
| AT91SAM9XE512-CU | BGA217 | Green | Industrial (-40° C to 85° C) |