| SRAM (Bytes) | 64K |
| LCD Controller | 1 |
| External Bus Interface | 1 |
| RTC/RTT | 39814 |
| 10-bit ADC Channels | 6 |
| Peripheral DMA Channels | 22 |
| Max. Clock Speed (MHz) | 240 |
| I/O Pins | 118 |
| SDRAM Interface | 1 |
| NAND Flash ECC | 39814 |
| Enhanced USART | 4 |
| USART/DBGU | -/1 |
| SPI | 1 |
| TWI | 2 |
| SSC | 2 |
| MCI | 1 |
| USB Device | HS |
| PWM Controller | 4 |
| 16-bit Timers | 3 |
| Period Interval Timer | 1 |
| Watchdog Timer | 1 |
| Power-On-Reset | 2 |
| On-chip RC Oscillator | 1 |
| Crystal Oscillator/PLL | 39846 |
| ARM Core | 926EJ-S |
| Cache Memory (Bytes) | 2x4K |
| MMU/MPU | 1/- |
| I/O Voltage Domain (V) | 3.3 |
| In-System Programming | Y |
| Single Supply | N |
| Pb-Free Packages | LFBGA 217 |
The AT91SAM9RL is an ARM9-based microcontroller focused on applications that support smart control panels. Its ARM926EJ-S processor, achieving 210 MIPS at 190 MHz, gives it the power required for intelligent user interfaces, and its double-buffered LCD controller with virtual screen support gives high-resolution, flicker-free displays. Its 64K bytes of on-chip SRAM gives it sufficient capacity for code execute-in-place and screen buffering. It has an External Bus Interface for access to a wide range of off-chip memories.
The AT91SAM9RL's proprietary distributed DMA architecture enables it to transfer the large amounts of data required for intelligent user interfaces with minimal processor overhead. Its extensive set of external interfaces, including 480 Mbits/sec USB 2.0, give it the connectivity required for deeply embedded networked systems.
The AT91SAM9RL is supported by an Evaluation Board and extensive third-party application development tools. Target applications range from the display panels in domestic white goods to those in industrial control systems.
o Incorporates the ARM926EJ-STM ARM(R) Thumb(R) Processor
– DSP Instruction Extensions
– ARM Jazelle(R) Technology for Java(R) Acceleration
– 4 Kbyte Data Cache, 4 Kbyte Instruction Cache, Write Buffer
– 210 MIPS at 190 MHz
– Memory Management Unit
– EmbeddedICETM In-circuit Emulation, Debug Communication Channel Support
– Mid-level implementation Embedded Trace MacrocellTM
o Multi-layer AHB Bus Matrix for Large Bandwidth Transfers
– Six 32-bit-layer Matrix
– Boot Mode Select Option, Remap Command
o One 32-KByte internal ROM, Single-cycle Access at Maximum Speed
o One 64-KByte internal SRAM, Single-cycle Access at Maximum Speed
– 4 Blocks of 16 Kbytes Configurable in TCM or General-purpose SRAM on the AHB
Bus Matrix
– Single-cycle Accessible on AHB Bus at Bus Speed
– Single-cycle Accessible on TCM Interface at Processor Speed
o 2-channel DMA
– Memory to Memory Transfer
– 16 Bytes FIFO
– LInked List
o External Bus Interface (EBI)
– EBI Supports SDRAM, Static Memory, ECC-enabled NAND Flash and
CompactFlash(R)
o LCD Controller (for AT91SAM9RL64 only)
– Supports Passive or Active Displays
– Up to 24 Bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode
– Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Virtual Screen
Support
o High Speed (480 Mbit/s) USB 2.0 Device Controller
– On-Chip High Speed Transceiver, UTMI+ Physical Interface
– Integrated FIFOs and Dedicated DMA
– 4 Kbyte Configurable Integrated DPRAM
o Fully-featured System Controller, including
– Reset Controller, Shutdown Controller
– Four 32-bit Battery Backup Registers for a Total of 16 Bytes
– Clock Generator and Power Management Controller
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer and Real-time Timer and Real-time Clock
o Reset Controller (RSTC)
– Based on Two Power-on Reset Cells
– Reset Source Identification and Reset Output Control
o Shutdown Controller (SHDC)
– Programmable Shutdown Pin Control and Wake-up Circuitry
o Clock Generator (CKGR)
– Selectable 32768 Hz Low-power Oscillator or Internal Low-power RC Oscillator on
Battery Backup Power Supply, Providing a Permanent Slow Clock
– 12 MHz On-chip Oscillator for Main System Clock and USB Clock– One PLL up to 240 MHz
– One PLL 480 MHz Optimized for USB HS
o Power Management Controller (PMC)
– Very Slow Clock Operating Mode, Software Programmable Power Optimization Capabilities
– Two Programmable External Clock Signals
o Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– One External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
o Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel, Programmable ICE Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
o Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
o Watchdog Timer (WDT)
– Key-protected, Programmable Only Once, Windowed 16-bit Counter Running at Slow Clock
o Real-time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock with 16-bit Prescaler
o Real-time Clock (RTC)
– Time, Date and Alarm 32-bit Parallel Load
– Low Power Consumption
– Programmable Periodic Interrupt
o One 6-channel 10-Bit Analog-to-Digital Converter
– Touch Screen Interface Compatible with Industry Standard 4-wire Sensitive Touch Panels
o Four 32-bit Parallel Input/Output Controllers (PIOA, PIOB, PIOC and PIOD)
– 118 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os for 217-ball BGA Package
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
o 22-channel Peripheral DMA Controller (PDC)
o One MultiMedia Card Interface (MCI)
– SDCard/SDIO 1.0 and MultiMediaCardTM 3.1 Compliant
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC
o Two Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I^2S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
o One AC97 Controller (AC97C)
– 6-channel Single AC97 Analog Front End Interface, Slot Assigner
o Four Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA(R) Infrared Modulation/Demodulation, Manchester Encoding/Decoding
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
o One Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– High-speed Synchronous Communications
o One Three-channel 16-bit Timer/Counter (TC)
– Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
o One Four-channel 16-bit PWM Controller (PWMC)
o Two Two-wire Interfaces (TWI)
– Compatible with Standard Two-wire Serial Memories
– One, Two or Three Bytes for Slave Address– Sequential Read/Write Operations
– Master, Multi-master and Slave Mode Operation
– Bit Rate: Up to 400 Kbits
– General Call Supported in Slave Mode
– Connection to Peripheral DMA Controller (PDC) Channel Capabilities Optimizes Data Transfers in Master Mode Only
(TWI0 only)
o SAM-BA(R) Boot Assistant
– Default Boot Program
– Interface with SAM-BA Graphic User Interface
o IEEE(R) 1149.1 JTAG Boundary Scan on All Digital Pins
o Required Power Supplies:
– 1.08 to 1.32V for VDDCORE, VDDUTMIC, VDDPLLB and VDDBU
– 3.0V to 3.6V for VDDPLLA, VDDANA, VDDUTMII and VDDIOP
– Programmable 1.65V to 1.95V or 3.0V to 3.6V for VDDIOM
o Available in a 144-ball BGA (AT91SAM9R64) and a 217-ball LFBGA (AT91SAM9RL64) Package
| Ordering Code | Package | Package Type | Operating Temperature Range |
| AT91SAM9R64-CU | LFBGA144 | Green | Industrial (-40° C to 85° C) |
| AT91SAM9RL64-CU | LFBGA217 | Green | Industrial (-40° C to 85° C) |