AT25F512B-MAH-T 512Kbit,SPI接口串行Flash存储器UDFN-8封装

Density	512K
I/O Pins	8
Interface Type	SPI
Page Size (Bytes)	256
Vcc (V)	2.7-3.6
Pb-Free Packages	UDFN 8 SOIC (150mil)8

512-Kbit, 2.7V-Minimum, 70 MHz SPI Serial Flash Memory, Byte and Page Program, Block Erase (4 KB and 32 KB) and Chip Erase, Full Device Protection, Hardware and Software Locking, Security Register, Automatic Program/Erase Fail Reporting, JEDEC Standard ID, 8-Lead SOIC (150-mil) and 8-Pad UDFN (2 x 3 x 0.6 mm)

The AT25F512B is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25F512B, with its erase granularity as small as 4 Kbytes, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices. The erase block sizes of the AT25F512B have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own erase regions, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added< while still maintaining the same overall device density. The device also contains a specialized OTP (One-Time Programmable) Security Register that can be used for purposes such as unique device serialization, system-level Electronic Serial Number (ESN) storage, locked key storage, etc. Specifically designed for use in 3-volt systems, the AT25F512B supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing.

AT25F512B-MAH-T 特性

• Single 2.7V - 3.6V Supply
• Serial Peripheral Interface (SPI) Compatible
  – Supports SPI Modes 0 and 3
• 70 MHz Maximum Operating Frequency
  – Clock-to-Output (tV) of 6 ns Maximum
• Flexible, Optimized Erase Architecture for Code + Data Storage Applications
  – Uniform 4-Kbyte Block Erase
  – Uniform 32-Kbyte Block Erase
  – Full Chip Erase
• Hardware Controlled Locking of Protected Sectors via WP Pin
• 128-Byte Programmable OTP Security Register
• Flexible Programming
  – Byte/Page Program (1 to 256 Bytes)
• Fast Program and Erase Times
  – 2.5 ms Typical Page Program (256 Bytes) Time
  – 100 ms Typical 4-Kbyte Block Erase Time
  – 500 ms Typical 32-Kbyte Block Erase Time
• Automatic Checking and Reporting of Erase/Program Failures
• JEDEC Standard Manufacturer and Device ID Read Methodology
• Low Power Dissipation
  – 6 mA Active Read Current (Typical at 20 MHz)
  – 5 μA Deep Power-Down Current (Typical)
• Endurance: 100,000 Program/Erase Cycles
• Data Retention: 20 Years
• Complies with Full Industrial Temperature Range
• Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
  – 8-lead SOIC (150-mil Wide)
  – 8-pad Ultra Thin DFN (2 x 3 x 0.6 mm)

AT25F512B-MAH-T 订购型号

Ordering Code	Package	Lead Finish	Operating Voltage	Max. Freq. (MHz)	Operation Range
AT25F512B-SSH-B AT25F512B-SSH-T	8S1	NiPdAu	2.7V to 3.6V	100	Industrial (-40°C to +85°C)
AT25F512B-MAH-T	8MA3	NiPdAu	2.7V to 3.6V	100	Industrial (-40°C to +85°C)

AT25F512B-MAH-T 应用技术支持与电子电路设计开发资源下载

1. ATMEL 爱特梅尔Flash 存储器AT25F512B 数据手册DataSheet 下载. PDF（PDF 文件格式完整版）
2. 串行Flash 产品选型指南（Excel 文档格式）
3. ATMEL 爱特梅尔公司全线产品目录. pdf