OP16S: Aerospace Precision JFET-Input Op Amp
The OP16S device offers clear advantages over industry-generic devices and are superior in performance to many dielectrically-isolated and hybrid op amps. All devices offer offset voltages as low as 0.5mV with TCVOS guaranteed to 10uV/°C. A unique input bias cancellation circuit reduces the IB by a factor of 10 over conventional designs. In addition, ADI specifies IB and IOS with the devices warmed up and operating at 25°C ambient.
The OP16S device was designed to provide real precision performance along with high speed. Although it can be nulled, the design objective was to provide low offset-voltage without nulling. Systems generally become more cost effective as the number of trim circuits is decreased. ADI achieves this performance by use of an improved Bipolar compatible JFET process coupled with on-chip, zener-zap offset triming.
OP16S 特点
- Low Input Offset Voltage: 500uV Max
- Low Input Offset Voltage Drift
- Minimum Slew Rate Guaranteed
- Temperature-Compensated Input Bias Controls
- Guaranteed Input Bias Current @ 125°C
- Bias Current Specified WARM UP Over Temperature
- Internal Compensation
- Low Input Noise Current
- High Common-Mode Rejection Ratio
OP16S 功能框图
| 产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
|---|---|---|---|---|
| 5962-8954304VGA | 量产 | ROUND HEADER/METAL CAN | 8 | 军用 |
| 5962-8954304VPA | 量产 | CERDIP GLASS SEAL | 8 | 军用 |
| 5962R8954304VGA | 量产 | ROUND HEADER/METAL CAN | 8 | 军用 |
| 5962R8954304VPA | 量产 | CERDIP GLASS SEAL | 8 | 军用 |