ADSP-21479: 第四代高性能DSP
第四代SHARC® Processors 现在内置低功耗浮点DSP产品（ADSP-21478和ADSP-21479），可提供改进的性能、基于硬件的滤波器加速器、面向音频与应用的外设以及能够支持单芯片解决方案的新型存储器配置。所有器件都彼此引脚兼容，而且与以往的所有SHARC处理器代码完全兼容。这些最新的第四代SHARC处理器系列产品都基于单指令多数据(SIMD)内核，该内核支持32位定点和32/40位浮点算法格式，而低功耗特性则使得这些处理器特别适用于电池供电应用或工作环境温度较高的应用。
在第四代SHARC处理器系列中，ADSP-21479具有极低功耗和266 MHz/1596 MFLOP的高性能，并采用BGA和LQFP封装。这一功耗特性使得ADSP-21479特别适用于要求低功耗的汽车音响和很多工业控制领域。除了高内核性能之外，ADSP-21479还包括其它处理模块，如FIR、IIR与FFT加速器，以提高系统的整体性能。此外，具有称为可变指令集架构(VISA)的新特性，可将代码规模缩小20%至30%，并提高存储器容量可用性。第四代DSP提供到16位宽SDR SDRAM的无缝接口，能够连接到外部存储器。
第四代SHARC处理器还集成了专用外设，以简化硬件设计、减少设计风险，并最终缩短上市时间。组合在一起的功能模块称为数字应用接口(DAI)，这些功能模块可以互相连接，或通过可以由软件编程的信号路由单元(SRU)连接到外部引脚。SRU是创新的架构特性，能够在DAI模块之间实现完整且灵活的路由。通过SRU连接的外设包括但不限于串行端口、SPI端口、S/PDIF Tx/Rx，以及八通道异步采样速率转换器模块。第四代SHARC允许通过DMA控制器将数据直接从串行端口传输至外部存储器。而UART与双线式接口等其它外设则通过数字外设接口(DPI)进行中继。
The fourth generation of SHARC® Processors, now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21479 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.
The ADSP-21479 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21479 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21479 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.
Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).
ADSP-21479 特点
- 内核时钟速率：266 MHz
- 片内RAM：5 Mb
- FIR、IIR与FFT加速器
- 16位宽SDR SDRAM外部存储器接口
- 数字应用接口(DAI)支持用户定义的外设访问，包括S/P DIF Tx/Rx和八通道异步采样速率转换器
- 全面增强的DMA引擎，包括分散/收集DMA、延迟线DMA
- 实时时钟(RTC)
- 8个串行端口(SPORT)，支持I2S、左对齐采样对，以及TDM模式
- 看门狗定时器
- 移位寄存器
- 2个SPI兼容型端口，支持主从两种模式
- UART 和双线式接口
- 16个脉冲宽度调制(PWM)通道
- 3 个全功能定时器
- 196引脚CSP_BGA和100 ld LQFP EPAD封装
- 商用、工业和汽车应用温度范围
- 266 MHz core clock speed
- 5 Mbits of on-chip RAM
- FIR, IIR, and FFT accelerators
- 16-bit wide SDR SDRAM external memory interface
- Digital Applications Interface (DAI) enabling user-definable access to peripherals including an S/P DIF Tx/Rx, and 8-channel asynchronous sample rate converter
- Fully enhanced DMA engine including scatter/gather DMA, delay line DMA
- Real-Time Clock (RTC)
- 8 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes
- Watch Dog Timer
- Shift Registers
- 2 SPI-compatible ports supporting master and slave modes
- UART and Two-Wire Interface
- 16 Pulse Width Modulation (PWM) channels
- 3 full-featured timers
- 196 ball CSP_BGA and 100 ld LQFP EPAD packages
- Commercial, Industrial, and automotive temperature ranges
ADSP-21479 技术指标
- Clock Speed (MHz): 266MHz
- MMACs: 532
- On-Chip SRAM (Mbits): 5Mbit
- Serial Ports: 8
- DAI: X
- Package: CSP_BGA,LQFP-EP
ADSP-21479 市场与应用
- 工业控制与仪器仪表
- 汽车音响
- 医疗应用
- Industrial Control and Instrumentation
- Automotive Audio
- Medical Applications
ADSP-21479 功能框图
ADSP-21479 评估版和开发套件
| Model | Package | Pins | Temp. Range |
Packing, Qty |
Price*(100-499) | Price*1000 pcs | RoHS |
|---|---|---|---|---|---|---|---|
| ADZS-21479-EZLITE 产品状态: 量产 | 评估板 | - | 1 | $ 550.00 | $ 550.00 | Yes | |
| ADZS-21479-EZBRD 产品状态: 量产 | 评估板 | - | 1 | $375.00 | $375.00 | Yes |