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ADN2812

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for -40°C to +85°C ambient temperature, unless otherwise noted.

This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver.

The receiver front end, loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output.

The ADN2812 is available in a compact 5 mm × 5 mm 32-lead lead frame chip scale package (LFCSP).

产品应用领域 Applications
ADN2812 特点
ADN2812 功能框图

ADN2812 芯片订购指南
产品型号 产品状态 封装 引脚 温度范围
ADN2812ACP 量产 32 ld LFCSP (5x5mm CP-32-2) 32 工业
ADN2812ACP-RL7 量产 32 ld LFCSP (5x5mm CP-32-2) 32 商业
ADN2812ACPZ 量产 32 ld LFCSP (5x5mm CP-32-2) 32 商业
ADN2812ACPZ-RL 量产 32 ld LFCSP (5x5mm CP-32-2) 32 商业
ADN2812ACPZ-RL7 量产 32 ld LFCSP (5x5mm CP-32-2) 32 商业
EVAL-ADN2812EBZ 量产 评估板 - 待定
ADN2812 应用技术支持与电子电路设计开发资源下载
  1. ADN2812 数据手册DataSheet 下载 . PDF
  2. ADI 模拟器件公司比较器产品选型指南 . PDF
  3. Analog Devices, Inc. 美国模拟器件公司产品订购手册 .PDF