ADN2806: 622 Mbps Clock and Data Recovery IC
The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ±5%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for -40°C to +85°C ambient temperature, unless otherwise noted.
This device, together with a PIN diode, TIA preamplifier, and a lim amp can implement a highly integrated, low cost, low power fiber optic receiver.
The ADN2806 is available in a compact 5 mm × 5 mm, 32-lead LFCSP.
产品应用领域 Applications
- BPON ONT
- SONET OC-12
- WDM transponders
- Regenerators/repeaters
- Test equipment
- Broadband cross-connects and routers
ADN2806 特点
- Exceeds SONET requirements for jitter transfer/generation/tolerance
- Patented clock recovery architecture
- No reference clock required
- Loss-of-lock indicator
- I^2C(R) interface to access optional features
- Single-supply operation: 3.3 V
- Low power: 359 mW typical
- 5 mm × 5 mm, 32-lead LFCSP, Pb free
ADN2806 功能框图
| 产品型号 | 产品状态 | 封装 | 引脚 | 温度范围 |
|---|---|---|---|---|
| ADN2806ACPZ | 量产 | 32 ld LFCSP (5x5mm CP-32-2) | 32 | 商业 |
| ADN2806ACPZ-500RL7 | 量产 | 32 ld LFCSP (5x5mm CP-32-2) | 32 | 商业 |
| ADN2806ACPZ-RL7 | 量产 | 32 ld LFCSP (5x5mm CP-32-2) | 32 | 商业 |
| EVAL-ADN2806EB | 量产 | 评估板 | - | 待定 |
| EVAL-ADN2806EBZ | 量产 | 评估板 | 1 | 待定 |