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ADF4108: PLL Frequency Synthesizer

The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low-noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and VCO (voltage controlled oscillator). Its very high bandwidth (8GHz) means that frequency doublers or prescalers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.

产品应用领域 Applications
ADF4108 特点
ADF4108 功能框图

ADF4108 芯片订购指南
产品型号 产品状态 封装 引脚 温度范围
ADF4108BCPZ 量产 20 ld LFCSP (4x4mm) 20 工业
ADF4108BCPZ-RL 量产 20 ld LFCSP (4x4mm) 20 工业
ADF4108BCPZ-RL7 量产 20 ld LFCSP (4x4mm) 20 工业
EVAL-ADF4108EBZ1 量产 评估板 - 待定
ADF4108 应用技术支持与电子电路设计开发资源下载
  1. ADF4108 数据手册DataSheet 下载 . PDF
  2. ADI 模拟器件公司比较器产品选型指南 . PDF
  3. Analog Devices, Inc. 美国模拟器件公司产品订购手册 .PDF
  4. 时钟和定时IC产品介绍 . PDF