ADF4001: 200MHz Clock Generator PLL

The ADF4001 frequency synthesizer can be used to implement clock sources for PLLs that require very low noise, stable reference signals. It consists of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, and a programmable 13-bit N counter. In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator) or VCXO (Voltage Controlled Crystal Oscillator). The N min value of 1 allows flexibility in clock generation.

ADF4001 特点

• 200 MHz Bandwidth
• 2.7 V to 5.5 V Power Supply
• Programmable Charge Pump Currents
• 3-Wire Serial Interface
• Hardware and Software Power-Down Mode
• Analog and Digital Lock Detect

ADF4001 功能框图

ADF4001 芯片订购指南

产品型号	产品状态	封装	引脚	温度范围
ADF4001BCP	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BCP-REEL	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BCP-REEL7	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BCPZ	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BCPZ-RL	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BCPZ-RL7	量产	20 ld LFCSP (4x4mm)	20	工业
ADF4001BRU	量产	16 ld TSSOP	16	工业
ADF4001BRU-REEL	量产	16 ld TSSOP	16	工业
ADF4001BRU-REEL7	量产	16 ld TSSOP	16	工业
ADF4001BRUZ	量产	16 ld TSSOP	16	工业
ADF4001BRUZ-R7	量产	16 ld TSSOP	16	工业
ADF4001BRUZ-RL	量产	16 ld TSSOP	16	工业
EVAL-ADF4001EBZ2	量产	评估板	-	待定

ADF4001 应用技术支持与电子电路设计开发资源下载

1. ADF4001 数据手册DataSheet 下载 . PDF
2. ADI 模拟器件公司比较器产品选型指南 . PDF
3. Analog Devices, Inc. 美国模拟器件公司产品订购手册 .PDF