AD9648 14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

AD9648: 14-Bit, 125 MSPS/105 MSPS, 1.8 V Dual Analog-to-Digital Converter

AD9648 功能框图 The AD9648 is a monolithic, dual-channel, 1.8 V supply, 14-bit, 105 MSPS/125 MSPS analog-to-digital converter (ADC). It features a high performance sample-and-hold circuit and on-chip voltage reference. The product uses multistage differential pipeline architecture with output error correction logic to provide 14-bit accuracy at 125 MSPS data rates and to guarantee no missing codes over the full operating temperature range.

The ADC contains several features designed to maximize flexibility and minimize system cost, such as programmable clock and data alignment and programmable digital test pattern generation. The available digital test patterns include built-in deterministic and pseudorandom patterns, along with custom user-defined test patterns entered via the serial port interface (SPI).A differential clock input controls all internal conversion cycles. An optional duty cycle stabilizer (DCS) compensates for wide variations in the clock duty cycle while maintaining excellent overall ADC performance.The digital output data is presented in offset binary, Gray code, or twos complement format. A data output clock (DCO) is provided for each ADC channel to ensure proper latch timing with receiving logic. Output logic levels of 1.8 V CMOS or LVDS are supported. Output data can also be multiplexed onto a single output bus.The AD9648 is available in a 64-lead RoHS compliant LFCSP and is specified over the industrial temperature range (−40°C to +85°C). This product is protected by a U.S. patent.

AD9648 特性

1.8 V analog supply operation
1.8 V CMOS or LVDS outputs
SNR = 74.5 dBFS @ 70 MHz
SFDR = 91 dBc @ 70 MHz
Low power: 78 mW/channel ADC core @ 125 MSPS
Differential analog input with 650 MHz bandwidth
IF sampling frequencies to200 MHz
On-chip voltage reference and sample-and-hold circuit
2 V p-p differential analog input
DNL = ±0.35 LSB
See data sheet for additional features

AD9648 亮点

The AD9648 operates from a single 1.8 V analog power supply and features a separate digital output driver supply to accommodate 1.8 V CMOS or LVDS logic families.
The patented sample-and-hold circuit maintains excellent performance for input frequencies up to 200 MHz and is designed for low cost, low power, and ease of use.
A standard serial port interface supports various product features and functions, such as data output formatting, internal clock divider, power-down, DCO/data timing and offset adjustments.
The AD9648 is packaged in a 64-lead RoHS compliant LFCSP that is pin compatible with the AD9650/AD9269/AD9268 16-bit ADC’s, the AD9258 14-bit ADC, the AD9628/AD9231 12-bit ADC’s, and the AD9608/AD9204 10-bit ADC’s, enabling a simple migration path between 10-bit and 16-bit converters sampling from 20 MSPS to 125 MSPS.

AD9648 技术指标

Resolution (Bits): 14bit
# Chan: 2
Sample Rate: 125MSPS
Interface: Par
Analog Input Type: Diff-Uni
Ain Range: (2Vref) p-p,2 V p-p
ADC Architecture: Pipelined
Pkg Type: CSP

AD9648 应用领域

Communications
Diversity radio systems
Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA
I/Q demodulation systems
Smart antenna systems
Broadband data applications
Battery-powered instruments
Hand held scope meters
Portable medical imaging
Ultrasound
Radar/LIDAR

AD9648 芯片订购指南

产品型号	封装	引脚	温度范围	包装和数量	报价*(100-499)	报价*1000 pcs	RoHS
AD9648-125EBZ 产品状态: 量产	评估板	64	工业	1	$ 250.00	$ 250.00	是
AD9648BCPZ-105 产品状态: 量产	LFCSP:LEADFRM CHIP SCALE	64	工业	Tray, 260	$ 49.75	$ 42.29	是
AD9648BCPZ-125 产品状态: 量产	LFCSP:LEADFRM CHIP SCALE	64	工业	Tray, 260	$ 60.29	$ 51.25	是
AD9648BCPZRL7-105 产品状态: 量产	LFCSP:LEADFRM CHIP SCALE	64	工业	Reel, 750	$ 49.75	$ 42.29	是
AD9648BCPZRL7-125 产品状态: 量产	LFCSP:LEADFRM CHIP SCALE	64	工业	Reel, 750	$ 60.29	$ 51.25	是