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AD809: 155 MHz Frequency Synthesizer

The AD809 provides a 155.52 MHz ECL/PECL output clock from either a 19.44 MHz or a 9.72 MHz TTL/CMOS/ECL/PECL reference frequency. The AD809 functionality supports a distributed timing architecture, allowing a backplane or PCB 19.44 MHz or 9.72 MHz timing reference signal to be distributed to multiple 155.52 Mbps ports. The AD809 can be applied to create the transmit bit clock for one or more ports.

An input signal multiplexer supports loop-timed applications where a 155.52 MHz transmit bit clock is recovered from the 155.52 Mbps received data.

The low jitter VCO, low power and wide operating temperature range make the device suitable for generating a 155.52 MHz bit clock for SONET/SDH/Fiber in the Loop systems.

The device has a low cost, on-chip VCO that locks to either 8x or 16x the frequency at the 19.44 MHz or 9.72 MHz input. No external components are needed for frequency synthesis; however, the user can adjust loop dynamics through selection of a damping factor capacitor whose value determines loop damping.

The AD809 design guarantees that the clock output frequency will drift low (by roughly 20%) in the absence of a signal at the input.

The AD809 consumes 90 mW and operates from a single power supply at either +5 V or -5.2 V.

AD809特点
AD809 功能框图

AD809 芯片订购指南
产品型号 产品状态 封装 引脚 温度范围
AD809BR-REEL7 量产 16 ld SOIC 16 工业
AD809BRZ 量产 16 ld SOIC 16 工业
AD809BRZ-REEL 量产 16 ld SOIC 16 工业
AD809BRZ-REEL7 量产 16 ld SOIC 16 工业
AD809 应用技术支持与电子电路设计开发资源下载
  1. AD809 数据手册DataSheet 下载 . PDF
  2. ADI 模拟器件公司比较器产品选型指南 . PDF
  3. Analog Devices, Inc. 美国模拟器件公司产品订购手册 .PDF