CY74FCT162H244CT 具有总线保持和三态输出的 16 位缓冲器/驱动器

CY74FCT162H244CT 描述

The CY74FCT16827T 20-bit buffer/line driver and the CY74FCT162827T 20-bit buffer/line driver provide high-performance bus interface buffering for wide data/address paths or buses carrying parity. These parts can be used as a single 20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of NANDed OE\ for increased flexibility.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The CY74FCT16827T is ideally suited for driving high-capacitance loads and low-impedance backplanes.

The CY74FCT162827T has 24-mA balanced output drivers with current-limiting resistors in the outputs.

CY74FCT162H244CT 特性

• Ioff Supports Partial-Power-Down Mode Operation
• Edge-rate control circuitry for significantly improved noise characteristics
• Typical output skew < 250 ps
• ESD > 2000V
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch) packages
• Industrial temperature range of -40°C to +85°C
• VCC = 5V ± 10%
• CY74FCT16827T Features:
• 64 mA sink current, 32 mA source current
• Typical VOLP (ground bounce) <1.0V at VCC = 5V, TA = 25°C
• CY74FCT162827T Features:
• Balanced 24 mA output drivers
• Reduced system switching noise
• Typical VOLP (ground bounce) <0.6V at VCC = 5V, TA = 25°C

CY74FCT162H244CT 应用技术支持与电子电路设计开发资源下载

1. CY74FCT162H244CT 数据资料 dataSheet 下载.PDF
2. TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
3. CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
4. Semiconductor Packing Methodology (PDF 3005 KB)
5. 逻辑产品选择指南 2006/2007 （修订版 Z）(4462KB)
6. 标准线性和逻辑产品 5 分钟指南 (786KB)
7. 了解和解释标准逻辑数据表
8. LOGIC Pocket Data Book (PDF 6001 KB)
9. HiRel Unitrode Power Management Brochure (PDF 206 KB)
10. Logic Cross-Reference (PDF 2938 KB)