TIR1000 具有 16 字节 FIFO、可选择的 IR 及 1284 模式的双路 UART
The TL16PIR552 has a dual-channel universal asynchronous receiver/transmitter (UART). The UART is similar to the TL16C550C. The device serves two serial input/output ports simultaneously in microcomputer or microprocessor-based systems. Each channel performs serial-to-parallel conversion on data characters received from peripheral devices or modems and parallel-to-serial conversion on data characters transmitted by the CPU. The complete status of each channel of the dual UART can be read by the CPU at any time during functional operation. The information obtained includes the type and condition of the transfer operation being performed and the error condition.
The receiver and transmitter FIFOs in the UARTs store up to 16 bytes including three additional bits of error status per byte for the receiver FIFO
|
TIR1000 |
| Number of Channels |
2 |
| FIFOs(bytes) |
16 |
| Operating Voltage(V) |
5 |
| Pin/Package |
80QFP |
| Rating |
Catalog |
| Tx / Rx FIFO INT Trig |
No / 4 Levels |
| Auto RTS/CTS |
Yes |
| CPU Interface |
X86 |
| Baud Rate (max) at Vcc = 5.0V and with 16X Sampling(Mbps) |
1.0 |
TIR1000 特性
- Dual TL16C550C Universal Asynchronous Receiver/Transmitters (UARTs)
- IEEE 1284 Bidirectional Parallel Data (PD) Port
- Compatible With Standard Centronics Parallel Interface
- Support for Parallel Protocols: Extended Capability Port (ECP) and Enhanced Parallel Port (EPP)
- Data Path 16-Byte FIFO Buffer
- Direct Memory Access (DMA) Transfer
- Decompression of Run Length Encoded Data in ECP Reverse Mode
- Direct Connection to Printer, No External Transceiver is Needed
- Serial Ports Have Infrared Data Association (IrDA) Inputs and Outputs
- 1200 bps to 115.2 kbps Data Rate
- 16-Byte FIFOs Reduce CPU Interrupts
- 12 mA Drive Current for All 1284 Control Terminals and Parallel Port Data Terminals
- Programmable Auto Flow Control on the UARTs
- Capable of Running With All Existing TL16C450 Software
- After Reset, All Registers Are Identical to the TL16C450 Register Set
- Up to 16-MHz Clock Rate for Up to 1-Mbaud Operation
- In the TL16C450 Mode, Hold and Shift Registers Eliminate the Need for Precise Synchronization Between the CPU and Serial Data
- Programmable Baud-Rate Generator Allows Division of Any Input Reference Clock by 1 to (216 -1) and Generates an Internal 16× Clock
- Adds or Deletes Standard Asynchronous Communication Bits (Start, Stop, and Parity) to or From the Serial Data Stream
- On-Board Prescaler With Programmable Divisor Values From 0 to 33
TIR1000 芯片订购指南
| 器件 |
状态 |
价格 |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| TL16PIR552PH |
ACTIVE |
7.65 | 1ku |
QFP (PH) | 80 |
66 | JEDEC TRAY (10+1) |
|
| TL16PIR552PHG4 |
ACTIVE |
7.65 | 1ku |
QFP (PH) | 80 |
66 | JEDEC TRAY (10+1) |
|
TIR1000 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| TL16PIR552PH |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16PIR552PH |
TL16PIR552PH |
| TL16PIR552PHG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-3-260C-168 HR |
TL16PIR552PHG4 |
TL16PIR552PHG4 |
TIR1000 应用技术支持与电子电路设计开发资源下载
- TIR1000 数据资料 dataSheet 下载.PDF
- TI 德州仪器其它接口选型与价格 . xls
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 使用数字隔离器设计隔离式 I2C 总线接口 (zhct119.PDF, 339 KB)
- 1Q 2011 Issue Analog Applications Journal (slyt399.PDF, 964 KB)
- 接口选择指南 (Rev. D) (PDF 2994 KB)
- Signaling Rate vs. Distance for Differential Buffers (PDF 420 KB)
- Q1 2009 Issue Analog Applications Journal (slyt319.PDF, 1.39 MB)
- Isolated RS-485 Reference Design (PDF 80 KB)
- 无铅组件涂层的保存期评估 (PDF 1305 KB)
- Analog Signal Chain Guide (8.62 MB)
- Industrial Interface IC Solutions (101 KB)