THS10064 10 位 6MSPS ADC，具有四通道 （可配置）、DSP/uP IF、集成 16x FIFO、通道 自动扫描和低功耗
|
THS10064 |
| Resolution(Bits) |
10 |
| Sample Rate (max) |
6MSPS |
| Architecture |
Pipeline |
| Power Consumption(Typ)(mW) |
186 |
| SINAD(dB) |
59 |
| SNR(dB) |
61 |
| SFDR(dB) |
65 |
| DNL(Max)(+/-LSB) |
1 |
| INL(Max)(+/-LSB) |
1 |
| No Missing Codes(Bits) |
10 |
| No. of Supplies |
2 |
| Analog Voltage AV/DD(Min)(V) |
4.75 |
| Analog Voltage AV/DD(Max)(V) |
5.25 |
| Logic Voltage DV/DD(Min)(V) |
3.0 |
| Logic Voltage DV/DD(Max)(V) |
5.25 |
| Input Configuration Range |
2.5V (p-p) |
| Reference Mode |
Int and Ext |
| Rating |
Catalog |
| Pin/Package |
32TSSOP |
| # Input Channels |
4 |
| Operating Temperature Range(°C) |
-40 to 85,0 to 70 |
THS10064 说明
The THS10064 is a CMOS, low-power, 10-bit, 6 MSPS analog-to-digital converter (ADC). The speed, resolution, bandwidth, and single-supply operation are suited for applications in radar, imaging, high-speed acquisition, and communications. A multistage pipelined architecture with output error correction logic provides for no missing codes over the full operating temperature range. Internal control registers are used to program the ADC into the desired mode. The THS10064 consists of four analog inputs, which are sampled simultaneously. These inputs can be selected individually and configured to single-ended or differential inputs. An integrated 16 word deep FIFO allows the storage of data in order to improve data transfers to the processor.
THS10064 特性
- High-Speed 6 MSPS ADC
- 4 Analog Inputs
- Simultaneous Sampling of 4 Single-Ended Signals or 2 Differential Signals or Combination of Both
- Differential Nonlinearity Error: ±1 LSB
- Integral Nonlinearity Error: ±1.5 LSB
- Signal-to-Noise and Distortion Ratio: 59 dB at fI = 2 MHz
- Auto-Scan Mode for 2, 3, or 4 Inputs
- 3-V or 5-V Digital Interface Compatible
- Low Power: 216 mW Max
- 5-V Analog Single Supply Operation
- Internal Voltage References ...50 PPM/°C and ±5% Accuracy
- Glueless DSP Interface
- Parallel uC/DSP Interface
- Integrated FIFO
- Available in TSSOP Package
- Pin Compatible With 12-Bit THS1206
- APPLICATIONS
- Radar Applications
- Communications
- Control Applications
THS10064 芯片订购指南
| 器件 |
状态 |
温度 (oC) |
价格（美元） |
封装 | 引脚 |
封装数量 | 封装载体 |
丝印标记 |
| THS10064CDA |
ACTIVE |
0 to 70 |
5.75 | 1ku |
TSSOP (DA) | 32 |
46 | TUBE |
THS10064 |
| THS10064CDAG4 |
ACTIVE |
0 to 70 |
5.75 | 1ku |
TSSOP (DA) | 32 |
46 | TUBE |
THS10064 |
| THS10064CDAR |
ACTIVE |
0 to 70 |
5.20 | 1ku |
TSSOP (DA) | 32 |
2000 | LARGE T&R |
THS10064 |
| THS10064CDARG4 |
ACTIVE |
0 to 70 |
5.20 | 1ku |
TSSOP (DA) | 32 |
2000 | LARGE T&R |
THS10064 |
| THS10064IDA |
ACTIVE |
-40 to 85 |
6.15 | 1ku |
TSSOP (DA) | 32 |
46 | TUBE |
THS10064I |
| THS10064IDAG4 |
ACTIVE |
-40 to 85 |
6.15 | 1ku |
TSSOP (DA) | 32 |
46 | TUBE |
THS10064I |
THS10064 质量与无铅数据
| 器件 |
环保计划* |
铅/焊球涂层 |
MSL 等级/回流焊峰 |
环保信息与无铅 (Pb-free) |
DPPM / MTBF / FIT 率 |
| THS10064CDA |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
|
THS10064CDA |
| THS10064CDAG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
THS10064CDAG4 |
THS10064CDAG4 |
| THS10064CDAR |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
|
THS10064CDAR |
| THS10064CDARG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
THS10064CDARG4 |
THS10064CDARG4 |
| THS10064IDA |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
|
THS10064IDA |
| THS10064IDAG4 |
Green (RoHS & no Sb/Br) |
CU NIPDAU |
Level-2-260C-1 YEAR |
THS10064IDAG4 |
THS10064IDAG4 |
THS10064 应用技术支持与电子电路设计开发资源下载
- THS10064 数据资料 dataSheet 下载.PDF
- TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
- 模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
- 所选封装材料的热学和电学性质 (PDF 645 KB)
- 高速数据转换 (PDF 1967 KB)
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF
1305 KB)
- A
Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF
461 KB)
- A Spreadsheet for Calculating the Frequency Response of the
ADS1250-54
- Understanding the ADS1251, ADS1253, and ADS1254 Input
Circuitry (PDF 39 KB)
- Analog-to-Digital Converter Grounding Practices Affect System
Performance (PDF 56 KB)
- Principles of Data Acquisition and Conversion (PDF 50 KB)
- Interleaving Analog-to-Digital Converters (PDF 64 KB)
- What
Designers Should Know About Data Converter Drift (PDF 95 KB)
- Giving Delta-Sigma Converters a Gain Boost with a Front End
Analog Gain Stage (PDF 70 KB)
- Programming Tricks for Higher Conversion Speeds Utilizing Delta
Sigma Converters (PDF 105 KB)
THS10064 工具与软件