SN74LV125AT 具有三态输出的四路总线缓冲器闸
SN74LV125AT 描述
The SN74LV125AT is a quadruple bus buffer gate. This device features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down
| SN74LV125AT | |
| Input Level | TTL |
| Output Level | CMOS |
| Rating | Catalog |
| Technology Family | LV-AT |
SN74LV125AT 特性
- Inputs Are TTL-Voltage Compatible
- 4.5-V to 5.5-V VCC Operation
- Typical tpd of 3.8 ns at 5 V
- Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 5 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 5 V, TA = 25°C
- Support Mixed-Mode Voltage Operation on All Ports
- Ioff Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
SN74LV125AT 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74LV125ATD | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 25 | TUBE | LV125AT |
| SN74LV125ATDE4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 25 | TUBE | LV125AT |
| SN74LV125ATDG4 | ACTIVE | -40 to 85 | 0.28 | 1ku | SOIC (D) | 14 | 25 | TUBE | LV125AT |
SN74LV125AT 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74LV125ATD | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LV125ATD | SN74LV125ATD |
| SN74LV125ATDE4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LV125ATDE4 | SN74LV125ATDE4 |
| SN74LV125ATDG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | SN74LV125ATDG4 | SN74LV125ATDG4 |
SN74LV125AT 应用技术支持与电子电路设计开发资源下载
- SN74LV125AT 数据资料 dataSheet 下载.PDF
- TI 德州仪器缓冲器、驱动器/收发器产品选型与价格 . xls
- CMOS 非缓冲反向器在振荡器电路中的使用 (PDF 951 KB)
- Semiconductor Packing Methodology (PDF 3005 KB)
- 逻辑产品选择指南 2006/2007 （修订版 Z）(4462KB)
- 标准线性和逻辑产品 5 分钟指南 (786KB)
- 了解和解释标准逻辑数据表
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)