This 32-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUCH32244 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE)\ inputs.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state
| SN74AUCH32244 | |
| Vcc range(V) | 0.8 to 2.7 |
| Logic | True |
| Output Drive(mA) | -9/9 |
| No. of Gates | 32 |
| No. of Outputs | 32 |
| tpd max(ns) | 1.8 |
| Static Current | 40 uA |
| Rating | Catalog |
| Technology Family | AUC |
| 器件 | 状态 | 温度 | 价格(美元) | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| SN74AUCH32244GKER | NRND | -40 to 85 | 5.90 | 1ku | LFBGA (GKE) | 96 | 1000 | LARGE T&R | MM244 |
| SN74AUCH32244ZKER | ACTIVE | -40 to 85 | 2.80 | 1ku | LFBGA (ZKE) | 96 | 1000 | LARGE T&R | MM244 |
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| SN74AUCH32244GKER | TBD | SNPB | Level-2-235C-1 YEAR | SN74AUCH32244GKER | SN74AUCH32244GKER |
| SN74AUCH32244ZKER | Green (RoHS & no Sb/Br) | SNAGCU | Level-3-260C-168 HR | SN74AUCH32244ZKER | SN74AUCH32244ZKER |