CD74HCT7046A 带 VCO 和锁定检测器的高速 CMOS 逻辑锁相环
The CD74HCT7046A provides a simple, cost-effective solution to high-accuracy, digital, phase-locked-loop applications. This device contains all the necessary circuits, with the exception of the divide-by-N counter, to build first-order phase-locked loops as shown in Figure 1.
Both exclusive-OR phase detectors (XORPDs) and edge-controlled (ECPD) phase detectors are provided for maximum flexibility.
Proper partitioning of the loop function, with many of the building blocks external to the package, makes it easy for the designer to incorporate ripple cancellation or to cascade to higher-order phase-locked loops.
The length of the up/down K counter is digitally programmable according to the K-counter function table
| CD74HCT7046A | |
| Voltage Nodes(V) | 5 |
| Rating | Catalog |
| Technology Family | ACT |
CD74HCT7046A 特性
- Speed of Bipolar FCT, AS, and S, With Significantly Reduced Power Consumption
- Digital Design Avoids Analog Compensation Errors
- Easily Cascadable for Higher-Order Loops
- Useful Frequency Range
- DC to 110 MHz Typical (K CLK)
- DC to 70 MHz Typical (I/D CLK)
- Dynamically Variable Bandwidth
- Very Narrow Bandwidth Attainable
- Power-On Reset
- Output Capability
- Standard: XORPD OUT, ECPD OUT
- Bus Driver: I/D OUT
- SCR Latch-Up-Resistant CMOS Process and Circuit Design
- Balanced Propagation Delays
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015
CD74HCT7046A 芯片订购指南
| 器件 | 状态 | 温度 | 价格（美元） | 封装 | 引脚 | 封装数量 | 封装载体 | 丝印标记 |
| CD74HCT7046AE | ACTIVE | -55 to 125 | 0.36 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74HCT7046AEE4 | ACTIVE | -55 to 125 | 0.36 | 1ku | PDIP (N) | 16 | 25 | TUBE | |
| CD74HCT7046AM | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| CD74HCT7046AM96 | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74HCT7046AM96E4 | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74HCT7046AM96G4 | ACTIVE | -55 to 125 | 0.33 | 1ku | SOIC (D) | 16 | 2500 | LARGE T&R | |
| CD74HCT7046AME4 | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 40 | TUBE | |
| CD74HCT7046AMG4 | ACTIVE | -55 to 125 | 0.40 | 1ku | SOIC (D) | 16 | 40 | TUBE |
CD74HCT7046A 质量与无铅数据
| 器件 | 环保计划* | 铅/焊球涂层 | MSL 等级/回流焊峰 | 环保信息与无铅 (Pb-free) | DPPM / MTBF / FIT 率 |
| CD74HCT7046AE | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HCT7046AE | CD74HCT7046AE |
| CD74HCT7046AEE4 | Pb-Free (RoHS) | CU NIPDAU | N/A for Pkg Type | CD74HCT7046AEE4 | CD74HCT7046AEE4 |
| CD74HCT7046AM | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AM | CD74HCT7046AM |
| CD74HCT7046AM96 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AM96 | CD74HCT7046AM96 |
| CD74HCT7046AM96E4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AM96E4 | CD74HCT7046AM96E4 |
| CD74HCT7046AM96G4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AM96G4 | CD74HCT7046AM96G4 |
| CD74HCT7046AME4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AME4 | CD74HCT7046AME4 |
| CD74HCT7046AMG4 | Green (RoHS & no Sb/Br) | CU NIPDAU | Level-1-260C-UNLIM | CD74HCT7046AMG4 | CD74HCT7046AMG4 |
CD74HCT7046A 应用技术支持与电子电路设计开发资源下载
- CD74HCT7046A 数据资料 dataSheet 下载.PDF
- TI 德州仪器特殊逻辑产品选型与价格 . xls
- Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
- Understanding and Interpreting Standard-Logic Data Sheets (PDF 857 KB)
- TI IBIS File Creation, Validation, and Distribution Processes (PDF 380 KB)
- Implications of Slow or Floating CMOS Inputs (PDF 101 KB)
- CMOS Power Consumption and CPD Calculation (PDF 89 KB)
- Designing With Logic (PDF 186 KB)
- Live Insertion (PDF 150 KB)
- Input and Output Characteristics of Digital Integrated Circuits (PDF 1708 KB)
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc (PDF 43 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- LOGIC Pocket Data Book (PDF 6001 KB)
- HiRel Unitrode Power Management Brochure (PDF 206 KB)
- Logic Cross-Reference (PDF 2938 KB)