ADS62C17 具有 SNRBoost 的双通道 11 位 200MSPS ADC

ADS62C17 同类产品

CDCE72010 - Recommended clocking solution, providing low jitter clock outputs to maximize converter performance

	ADS62C15	ADS62C17
Resolution(Bits)	11	11
Sample Rate (max)	125MSPS	200MSPS
Architecture	Pipeline	Pipeline
Power Consumption(Typ)(mW)	740	1081
SINAD(dB)	67.1	66.9
SNR(dB)	67.2	67
SFDR(dB)	89	85
DNL(Max)(+/-LSB)	0.8	0.6
INL(Max)(+/-LSB)	3.5	2.5
No Missing Codes(Bits)	11	11
ENOB(Bits)	10.8	10.8
No. of Supplies	2	2
Analog Voltage AV/DD(Min)(V)	3.0	3.15
Analog Voltage AV/DD(Max)(V)	3.6	3.8
Logic Voltage DV/DD(Min)(V)	3.0	1.7
Logic Voltage DV/DD(Max)(V)	3.6	1.9
Input Configuration Range	2V (p-p)	2V (p-p)
Reference Mode	Int and Ext	Int and Ext
Rating	Catalog	Catalog
Pin/Package	64VQFN	64VQFN
# Input Channels	2	2
Operating Temperature Range(°C)	-40 to 85	-40 to 85

ADS62C17 说明

ADS62C17 is a dual channel 11-bit, 200 MSPS A/D converter that combines high dynamic performance and low power consumption in a compact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width communications applications.

ADS62C17 uses TI-proprietary SNRBoost technology that can be used to overcome SNR limitation due to quantization noise for bandwidths less than Nyquist (Fs/2). It includes several useful and commonly used digital functions such as ADC offset correction, gain (0 to 6 dB in steps of 0.5 dB) and gain tuning (in fine steps of 0.001 dB).

The gain option can be used to improve SFDR performance at lower full-scale input ranges. Using the gain tuning capability, each channel’s gain can be set independently to improve channel-to-channel gain matching.

ADS62C17 特性

Maximum Sample Rate: 200 MSPS
11-bit Resolution with No Missing Codes
90 dBc SFDR at Fin = 10 MHz
79.8 dBFS SNR at 125 MHz IF, 20 MHz BW using TI proprietary SNRBoost technology
Total Power 1.1 W at 200 MSPS
90 dB Cross-talk
Double Data Rate (DDR) LVDS and Parallel CMOS Output Options
Programmable Gain up to 6dB for SNR/SFDR Trade-off
DC Offset Correction
Gain Tuning Capability in Fine Steps (0.001 dB) Allows Channel-to-channel Gain Matching
Supports Input Clock Amplitude Down to 400 mV p-p Differential
Internal and External Reference Support
64-QFN Package (9 mm × 9 mm)

ADS62C17 芯片订购指南

器件	状态	温度 (oC)	价格（美元）	封装 \| 引脚	封装数量 \| 封装载体	丝印标记
ADS62C17IRGC25	ACTIVE	-40 to 85	88.75 \| 100u	VQFN (RGC) \| 64	25 \| SMALL T&R	AZ62C17
ADS62C17IRGCR	ACTIVE	-40 to 85	82.50 \| 100u	VQFN (RGC) \| 64	2000 \| LARGE T&R	AZ62C17
ADS62C17IRGCT	ACTIVE	-40 to 85	82.50 \| 100u	VQFN (RGC) \| 64	250 \| SMALL T&R	AZ62C17

ADS62C17 质量与无铅数据

器件	环保计划*	铅/焊球涂层	MSL 等级/回流焊峰	环保信息与无铅 (Pb-free)	DPPM / MTBF / FIT 率
ADS62C17IRGC25	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		ADS62C17IRGC25
ADS62C17IRGCR	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		ADS62C17IRGCR
ADS62C17IRGCT	Green (RoHS & no Sb/Br)	CU NIPDAU	Level-3-260C-168 HR		ADS62C17IRGCT

ADS62C17 应用技术支持与电子电路设计开发资源下载

ADS62C17 数据资料 dataSheet 下载.PDF
TI 德州仪器仪ADC 模数转换器产品选型与价格 . xls
模数规格和性能特性术语表 (Rev. A) (PDF 1993 KB)
所选封装材料的热学和电学性质 (PDF 645 KB)
高速数据转换 (PDF 1967 KB)
Shelf-Life Evaluation of Lead-Free Component Finishes (PDF 1305 KB)
A Spreadsheet for Calculating the Frequency Response of the ADS1250-54 (PDF 461 KB)
A Spreadsheet for Calculating the Frequency Response of the ADS1250-54
Understanding the ADS1251, ADS1253, and ADS1254 Input Circuitry (PDF 39 KB)
Analog-to-Digital Converter Grounding Practices Affect System Performance (PDF 56 KB)
Principles of Data Acquisition and Conversion (PDF 50 KB)
Interleaving Analog-to-Digital Converters (PDF 64 KB)
What Designers Should Know About Data Converter Drift (PDF 95 KB)
Giving Delta-Sigma Converters a Gain Boost with a Front End Analog Gain Stage (PDF 70 KB)
Programming Tricks for Higher Conversion Speeds Utilizing Delta Sigma Converters (PDF 105 KB)

ADS62C17 工具与软件

名称	型号	公司	工具/软件类型
ADS62C17 评估模块	ADS62C17EVM	Texas Instruments	开发电路板/EVM
用于模数转换器的抗混淆计算工具	ANTIALIASINGCALC	Texas Instruments	计算实用程序
运算放大器至 ADC 电路拓扑计算器	ADC-INPUT-CALC	Texas Instruments	计算实用程序