M48Z128Y 5.0或3.3V,1兆位( 128千比特× 8 ) ZEROPOWER ?的SRAM
The M48Z128/Y/V ZEROPOWER? RAM is a 128 Kbit x 8 non-volatile static RAM organized as131,072 words by 8 bits. The device combines an internal lithium battery, a CMOS SRAM and a control circuit in a plastic, 32-pin DIP module. This solution is available in two special packages to provide a highly integrated battery backed-up memory solution.
The M48Z128/Y/V is a non-volatile pin and function equivalent to any JEDEC standard 128K x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. The 32-pin, 600mil DIP Module houses the M48Z128/Y/V silicon with a long life lithium button cell in a single package.
For surface-mount environments ST provides an equivalent SMT solution consisting of a 28-pin, 330mil SOIC NVRAM SUPERVISOR (M40Z300/ W) and a 32-pin, (TSOP, 8 x 20mm) 1Mb LPSRAM. Both 5V and 3V versions are available (see Table 2., page 6).
The 28-pin, 330mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAT? housing containing the battery.
The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface-mount process. Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surfacemounting. The SNAPHAT housing is keyed to prevent reverse insertion.
The SNAPHAT battery package is shipped separately in plastic anti-static tubes or in Tape & Reel form. The part number is “M4Zxx-BR00SH” (see Table 17., page 19).
M48Z128Y 订购型号:
| Ordering Model | Package | RoHS Compliance Grade | Marketing Status | Memory Organization | Supply Voltage(Vcc) | Supply Voltage(Vcc) | Operating Range | Packing Type |
| min | max | |||||||
| V | V | |||||||
| M48Z128Y-70PM1 | HYBRID MODULE 32L | Ecopack2 | Active | 1Mb (128K x 8) | 4.5 | 5.5 | Commercial | Tube |
| M48Z128Y-85PM1 | HYBRID MODULE 32L | Ecopack2 | Active | 1Mb (128K x 8) | 4.5 | 5.5 | Commercial | Tube |
M48Z128Y 产品特性:
- INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, AND BATTERY
- CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES
- 10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER
- BATTERY INTERNALLY ISOLATED UNTIL POWER IS FIRST APPLIED
- AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION
- WRITE PROTECT VOLTAGES:
(VPFD = Power-fail Deselect Voltage)
– M48Z128: VCC = 4.75 to 5.5V 4.5V ≤ VPFD ≤ 4.75V
– M48Z128Y: VCC = 4.5 to 5.5V 4.2V ≤ VPFD ≤ 4.5V
– M48Z128V: VCC = 3.0 to 3.6V 2.8V ≤ VPFD ≤ 3.0V - SOIC PACKAGE PROVIDES DIRECT CONNECTION FOR A SNAPHAT TOP WHICH CONTAINS THE BATTERY
- SNAPHAT HOUSING (BATTERY) IS REPLACEABLE
- PIN AND FUNCTION COMPATIBLE WITH JEDEC STANDARD 128K x 8 SRAMs
- EQUIVALENT SURFACE-MOUNT (SMT) SOLUTION REQUIRES A 28-PIN M40Z300/ W and A STAND-ALONE 128K x8 LPSRAM (SNAPHAT? Top to be ordered separately)
M48Z128Y 技术支持与电子电路设计开发资源下载
- M48Z128Y 数据手册DataSheet下载.PDF
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