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M40SZ100W 5V或3V的NVRAM

The M40SZ100Y/W NVRAM Controller is a self-contained device which converts a standard low-power SRAM into a non-volatile memory. A precision voltage reference and comparator monitors the VCC input for an out-of-tolerance condition.

When an invalid VCC condition occurs, the conditioned chip enable output (ECON) is forced inactive to write protect the stored data in the SRAM. During a power failure, the SRAM is switched from the VCC pin to the lithium cell within the SNAPHAT (or external battery for the 16-lead SOIC) to provide the energy required for data retention. On a subsequent power-up, the SRAM remains write protected until a valid power condition returns.

The 28-pin, 330 mil SOIC provides sockets with gold plated contacts for direct connection to a separate SNAPHAT? housing containing the battery. The SNAPHAT housing has gold plated pins which mate with the sockets, ensuring reliable connection. The housing is keyed to prevent improper insertion. This unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process which greatly reduces the board manufacturing process complexity of either directly soldering or inserting a battery into a soldered holder. Providing non-volatility becomes a “SNAP.” This feature is also available in the “topless” 16-pin SOIC package (MQ). Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is also keyed to prevent reverse insertion.

M40SZ100W 订购型号
Ordering Model Package Conditioned Chip Enable Outputs(Econ) RST Threshold(VPFD) Packing Type
typ typ
V
M40SZ100WMQ6E SO16 1 2.6 Tube
M40SZ100WMQ6F SO16 1 2.6 Tape And Reel
M40SZ100W 产品特性:
M40SZ100W 技术支持与电子电路设计开发资源下载
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