The ICM7243 is an 8-character, alphanumeric display driver and controller which provides all the circuitry required to interface a microprocessor or digital system to a 14-segment or 16-segment display. It is primarily intended for use in microprocessor systems, where it minimizes hardware and software overhead. Incorporated on-chip are a 64-character ASClI decoder, 8 x 6 memory, high power character and segment drivers, and the multiplex scan circuitry.
6-bit ASCll data to be displayed is written into the memory directly from the microprocessor data bus. Data location depends upon the selection of either Sequential (MODE = 1) or Random access mode (MODE = 0). In the Sequential Access mode the first entry is stored in the lowest location and displayed in the "left-most" character position. Each subsequent entry is automatically stored in the next higher location and displayed to the immediate "right" of the previous entry. A DISPlay FULL signal is provided after 8 entries; this signal can be used for cascading devices together. A CLeaR pin is provided to clear the memory and reset the location counter. The Random Access mode allows the processor to select the memory address and display digit for each input word.
The character multiplex scan runs whenever data is not being entered. It scans the memory and CHARacter drivers, and ensures that the decoding from memory to display is done in the proper sequence. Intercharacter blanking is provided to avoid display ghosting.
芯片型号 | 产品状态 | 温度范围 | 封装尺寸图 | 潮湿敏感度等级MSL | 美元价格US $ |
ICM7243AIM44Z | 量产 | 工业级 | 44 Ld MQFP | 3 | 7.92 |
ICM7243AIM44ZT | 量产 | 工业级 | 44 Ld MQFP T+R | 3 | 7.92 |
ICM7243AIPLZ | 量产 | 工业级 | 40 Ld PDIP | N/A | 7.92 |
ICM7243BIPL | 量产 | 工业级 | 40 Ld PDIP | N/A | 10.77 |
ICM7243BIPLZ | 量产 | 工业级 | 40 Ld PDIP | N/A | 7.92 |
ICM7243ACM44Z | 停产 | 民用级 | 44 Ld MQFP | 3 | N/A |
ICM7243ACM44ZT | 停产 | 民用级 | 44 Ld MQFP T+R | 3 | N/A |