ATMEL 爱特梅尔串行FLASH 存储器AT45DB321C

AT45DB321C 概述

The AT45DB321C is an SPI compatible, serial-interface Flash memory ideally suited for a wide variety of digital voice-, image-, program code- and datastorage applications. The AT45DB321C supports a 4-wire serial interface known as RapidS for applications requiring very high speed operations.Its 34,603,008 bits of memory are organized as 8192 pages of 528 bytes each. In addition to the 33-megabit main memory, the AT45DB321C also contains two SRAM
buffers of 528 bytes each.The buffers allow the receiving of data while a page in the main page Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation (bit or byte alterability) is easily handled with a self-contained three step read-modify-write
operation. Unlike conventional Flash memories that are accessed randomly with multiple
address lines and a parallel interface, the DataFlash uses a RapidS serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, lowvoltage and low-power are essential. The device operates at clock frequencies up to 40 MHz with a typical active read current consumption of 10 mA.

To allow for simple in-system reprogrammability, the AT45DB321C does not require high input
voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for
both the program and read operations. The AT45DB321C is enabled through the chip select pin
(CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Output
(SO), and the Serial Clock (SCK). All programming and erase cycles are self-timed.

AT45DB321C 特性

• Single 2.7 - 3.6V Supply
  o RapidSTM Serial Interface: 40 MHz Maximum Clock Frequency
  (SPI Modes 0 and 3 Compatible for Frequencies Up to 33 MHz)
  o Page Program
  – 8192 Pages (528 Bytes/Page)
  o Automated Erase Operations
  – Page Erase 528 Bytes
  – Block Erase 4,224 Bytes
  o Two 528-byte SRAM Data Buffers – Allows Receiving of Data
  while Reprogramming the Flash Array
  o Continuous Read Capability through Entire Array
  – Ideal for Code Shadowing Applications
  o Low-power Dissipation
  – 10 mA Active Read Current Typical
  – 6 μA Standby Current Typical
  o Hardware and Software Data Protection Features
  – Individual Sector Locking
  o Security: 128-byte Security Register
  – 64-byte User Programmable Space
  – Unique 64-byte Device Identifier
  o JEDEC Standard Manufacturer and Device ID Read
  o 100,000 Program/Erase Cycles per Page Minimum
  o Data Retention – 20 years
  o Commercial and Industrial Temperature Ranges
  o Green (Pb/Halide-free/RoHS Compliant) Packaging Options

AT45DB321C 订购型号

Ordering Code	Package	Lead Finish	Operating Voltage	Max. Freq. (MHz)	Operation Range
AT45DB321C-CC AT45DB321C-CNC AT45DB321C-TC	24C3 8CN3 28T	-	-	40	Commercial (0° C to 70° C)
AT45DB321C-CI AT45DB321C-TI	24C3 28T	-	-	40	Industrial (-40°C to +85°C)
AT45DB321C-RC	28R	-	-	40	Commercial (0° C to 70° C)
AT45DB321C-RU	28R	-	-	40	Industrial (-40°C to +85°C)