ADSP-21478: 第四代高性能DSP
第四代SHARC®处理器系列现在有了低功耗浮点DSP产品——即ADSP-21478和ADSP-21478 ——具有更高的性能，提供硬件型滤波器加速器、音频和应用专用外设以及支持单芯片解决方案的新型存储器配置。所有器件均相互引脚兼容，且与以前的所有SHARC处理器全代码兼容。第四代SHARC处理器系列的这些最新成员基于一款单指令多数据(SIMD)内核制成，支持32位定点和32/40位浮点算法格式，低功耗特性使其成为电池供电应用或环境工作温度要求较高的应用的理想选择。
ADSP-21478具有极低的功耗和较高的性能——266 MHz/1596 MFLOP——采用BGA和LQFP封装，是第四代SHARC处理器系列中的一员。其低功耗特性使ADSP-21478成为存在低功耗要求的汽车音频和多种工业控制应用的最佳选择。ADSP-21478不但拥有较高的内核性能，而且内置了FIR、IIR和FFT加速器等额外的处理模块，可以大幅提升系统的整体性能。可变指令集架构(VISA)是其特色新功能之一，可使代码减少20%至30%，从而提高存储器的可用性。第四代DSP为16位宽SDR SDRAM提供了一个无缝接口，可以连接外部存储器。
第四代SHARC处理器同时集成应用专用外设，有利于简化硬件设计、减少设计风险并最终缩短上市时间。这些功能模块被称为数字应用接口(DAI)，可以相互连接，也可连接通过软件可编程信号路由单元(SRU)连接至外部引脚。SRU是一种新型架构，可在DAI模块间实现完全、灵活路由。可通过SRU连接的外设包括但不限于串行端口、SPI端口、S/PDIF Tx/Rx和8通道异步采样速率转换器模块。第四代SHARC可将来自串行端口的数据通过DMA控制器直接传输到外部存储器。UART、双线接口等其他外设通过数字外设接口(DPI)路由。
The fourth generation of SHARC® Processors, now includes the low power floating point DSP products – the ADSP-21478 and ADSP-21478 and offers increased performance, hardware-based filter accelerators, audio and application-focused peripherals, and new memory configurations capable of supporting a single chip solution. All devices are pin-compatible with each other and completely code-compatible with all prior SHARC Processors. These newest members of the fourth generation SHARC Processor family are based on a single-instruction, multiple-data (SIMD) core, which supports both 32-bit fixed-point and 32-/40-bit floating-point arithmetic formats and their low power make them particularly suitable for battery powered applications or where a higher ambient operating temperature is required.
The ADSP-21478 offers a very low power and high performance – 266 MHz/1596 MFLOPs – in a BGA and LQFP package within the fourth generation SHARC Processor family. This feature of power makes the ADSP-21478 particularly well suited to address the automotive audio and many industrial control segments where low power is a requirement. In addition to its high core performance, the ADSP-21478 includes additional processing blocks such as FIR, IIR, and FFT accelerators to increase the total performance of the system. There is a new feature called Variable Instruction Set Architecture (VISA) that allows the code size to be decreased by 20% to 30% and increase the memory size availability. The fourth generation DSP allows the ability to connect to external memory by providing a glueless interface to 16-bit wide SDR SDRAMs.
Fourth-generation SHARC Processors also integrate application-specific peripherals designed to simplify hardware design, minimize design risks, and ultimately reduce time to market. Grouped together, and broadly named the Digital Applications Interface (DAI), these functional blocks may be connected to each other or to external pins via the software-programmable Signal Routing Unit (SRU). The SRU is an innovative architectural feature that enables complete and flexible routing amongst DAI blocks. Peripherals connected through the SRU include but are not limited to serial ports, SPI ports, S/PDIF Tx/Rx, and an 8-Channel asynchronous sample rate converter block. The fourth generation SHARC allows data from the serial ports to be directly transferred to external memory by the DMA controller. Other peripherals such as UART and Two-Wire Interface are routed through a Digital Peripheral Interface (DPI).
ADSP-21478 特点
- 266 MHz内核时钟速度
- 3 MB片内RAM
- FIR、IIR和FFT加速器
- 16位宽SDR SDRAM外部存储器接口
- 数字应用接口(DAI)可实现用户定制访问外设，包括1个S/P DIF Tx/Rx和1个8通道异步采样速率转换器
- 全面增强的DMA引擎，包括分散/聚集DMA、延迟线DMA
- 实时时钟(RTC)
- 8个串行端口(SPORT)，支持I2S、左对齐采样对和TDM模式
- 看门狗定时器
- 移位寄存器
- 2个SPI兼容端口，支持主机和从机模式
- UART和双线接口
- 16个脉冲宽度调制(PWM)通道
- 3个全功能定时器
- 196引脚CSP_BGA和100 ld LQFP EPAD封装
- 商用、工业和汽车应用温度范围
- 266 MHz core clock speed
- 3 Mbits of on-chip RAM
- FIR, IIR, and FFT accelerators
- 16-bit wide SDR SDRAM external memory interface
- Digital Applications Interface (DAI) enabling user-definable access to peripherals including an S/P DIF Tx/Rx, and 8-channel asynchronous sample rate converter
- Fully enhanced DMA engine including scatter/gather DMA, delay line DMA
- Real-Time Clock (RTC)
- 8 serial ports (SPORTs) supporting I2S, left-justified sample pair, and TDM modes
- Watch Dog Timer
- Shift Registers
- 2 SPI-compatible ports supporting master and slave modes
- UART and Two-Wire Interface
- 16 Pulse Width Modulation (PWM) channels
- 3 full-featured timers
- 196 ball CSP_BGA and 100 ld LQFP EPAD packages
- Commercial, Industrial, and automotive temperature ranges
ADSP-21478 技术指标
- Clock Speed (MHz): 266MHz
- MMACs: 532
- On-Chip SRAM (Mbits): 3Mbit
- Serial Ports: 8
- DAI: X
- Package: CSP_BGA,LQFP-EP
ADSP-21478 市场与应用
- Industrial Control and Instrumentation
- Automotive Audio
- Medical Applications
- 工业控制与仪器仪表
- 汽车音响
- 医疗应用
ADSP-21478 功能框图
ADSP-21478 评估版和开发套件
| Model | Package | Pins | Temp. Range |
Packing, Qty |
Price*(100-499) | Price*1000 pcs | RoHS |
|---|---|---|---|---|---|---|---|
| ADZS-21479-EZLITE 产品状态: 量产 | 评估板 | - | 1 | $ 550.00 | $ 550.00 | Yes | |
| ADZS-21479-EZBRD 产品状态: 量产 | 评估板 | - | 1 | $375.00 | $375.00 | Yes |